发明名称 SWITCHED CAPACITOR CIRCUIT AND PIPELINE A/D CONVERTER
摘要 There is provided a switched capacitor circuit and a pipeline A/D converter which are capable of suppressing electric power from being increased by utilizing a level-shift capacitor, even in a case where the switched capacitor circuit and the pipeline A/D converter are configured by utilizing a CLS technique. In the estimate phase, the capacitor Cc1 (level shift capacitor) is connected between the output terminal of the operational amplifier AMP2 and the inverting input terminal of the operational amplifier AMP2, so as to sample the output from the operational amplifier AMP2, and also to compensate the phase of the operational amplifier AMP2. Additionally, in the level shift phase, the capacitor Cc1 is connected between the output terminal of the operational amplifier 4 and the output terminal Vb, so as to be used to level-shift the output of the operational amplifier AMP2. Thereby, the load (the capacitance of the capacitors Cc1 and Cc2) on the operational amplifier AMP2 is reduced, thereby reducing the electric power of the switched capacitor circuit 200.
申请公布号 US2010045495(A1) 申请公布日期 2010.02.25
申请号 US20090605770 申请日期 2009.10.26
申请人 SANO MITSUHIRO 发明人 SANO MITSUHIRO
分类号 H03M1/02;G11C27/02 主分类号 H03M1/02
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