发明名称 Integrated circuit, has memory arrangement divided into plates, and word line control assigned to each plate, where part of control is arranged at edge of plate and other part of control arranged on another edge of plate
摘要 <p>The circuit (1) has a memory e.g. static RAM, arrangement (2) divided into plates (3a-3d), and a word line control (4) assigned to each plate. A part (4a) of the word line control is arranged at an edge (3e) of the plate, and another part (4b) of the word line control is arranged on another edge (3f) of the plate. The plate is divided into two parts (6a, 6b) by a boundary line (6) that runs parallel to opposite edges. Data lines (8a-8d) are provided for writing into the plate and/or for reading from the plate arranged at an additional edge (3g) of the plate.</p>
申请公布号 DE102008039035(A1) 申请公布日期 2010.02.25
申请号 DE20081039035 申请日期 2008.08.21
申请人 QIMONDA AG 发明人 MARKERT, MICHAEL;SCHNABEL, RAINER FLORIAN;SCHNEIDER, HELMUT
分类号 G11C8/08;G11C8/14 主分类号 G11C8/08
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