STACKED MEMORY CHIP, SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE USING SAME, AND MANUFACTURING METHOD THEREFOR

摘要

Memory areas that operate independently for each logic macro of a semiconductor chip cannot be reserved with the memory configuration required by the logic macros. A stacked memory chip stacked on the semiconductor chip comprises a plurality of memory elements arranged in a two-dimensional array, wherein each of the memory elements is provided with an inter-chip I/O section for transmitting a signal between the stacked memory chip and the semiconductor chip, a memory macro capable of writing and reading data, and first wiring for transmitting the data, an address signal, and a command between the adjacent memory elements, and wherein the write data from the semiconductor chip is transferred to the memory macros of the memory elements via the inter-chip I/O sections to perform the write operation, and the data read from the memory macros is transferred to the semiconductor chip via the inter-chip I/O sections.