发明名称 COMMUNICATING ON AN ELECTRICAL BUS
摘要 <p>Method and apparatus for communicating on an electrical bus (HS, LS) by generating a master logical signal on the electrical bus (HS, LS) in the form of a pulse-width modulation signal. Generating a slave logical signal on the electrical bus (HS, LS) in the form of a current signal. Reading the slave logical signal by sampling the magnitude of the current signal on the electrical bus (HS, LS), wherein magnitude of the current on the electrical bus (HS, LS) is sampled at a point in the bit time when the voltage on the electrical bus (HS, LS) has remained constant for a period longer than the shortest time that the voltage remains at any level during the bit time.</p>
申请公布号 WO2010020838(A1) 申请公布日期 2010.02.25
申请号 WO2008IB54480 申请日期 2008.08.22
申请人 FREESCALE SEMICONDUCTOR, INC.;LANCE, PHILIPPE;BERNON-ENJALBERT, VALERIE;CASSAGNES, THIERRY 发明人 LANCE, PHILIPPE;BERNON-ENJALBERT, VALERIE;CASSAGNES, THIERRY
分类号 H04L12/403;H04L12/40 主分类号 H04L12/403
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