发明名称 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
摘要 <P>PROBLEM TO BE SOLVED: To prevent deterioration of mechanical strength of a whole element, and to reduce delay of signals propagating through wirings. <P>SOLUTION: First and third insulating layers constituting each wiring layer 100 include silicon carbide nitride film, silicon carbide and/or silicon oxide. A second insulating layer of a lower-layer wiring layer includes silicon oxide. A second insulating layer of an upper-layer wiring layer includes fluorine-added silicon oxide and/or carbon added silicon oxide. A relative dielectric constant of the second insulating layer of the lower-layer wiring layer is set smaller than that of the second insulating layer of the upper-layer wiring layer. <P>COPYRIGHT: (C)2010,JPO&INPIT
申请公布号 JP2010045406(A) 申请公布日期 2010.02.25
申请号 JP20090266058 申请日期 2009.11.24
申请人 RENESAS TECHNOLOGY CORP 发明人 TANAKA JUN;OTANI YOSHIHARU;OGATA KIYOSHI;SUZUKI YASUMICHI;HOTTA KATSUHIKO
分类号 H01L21/3205;H01L21/768;H01L21/31;H01L21/314;H01L21/316;H01L21/318;H01L23/31;H01L23/48;H01L23/52;H01L23/522;H01L23/525;H01L23/532;H01L23/58;H01L31/0328 主分类号 H01L21/3205
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