| 摘要 |
<p>Provided is a PLL frequency synthesizer (1) capable of switching frequencies at high speed by reducing the frequency fluctuation of when the bandwidth of a loop filter (60) is switched over. The PLL frequency synthesizer is provided with a reference oscillator (10), a frequency divider (30), a phase comparator (40), a charge pump (50), the loop filter (60), and a VCO (70). The loop filter includes a first path (L1) and a second path (L2) provided in parallel with each other between the charge pump and the VCO, a first switch (65) provided on the first path, and a second switch (66) provided on the second path, wherein when both of the first switch and the second switch are in an off-state, the respective parasitic capacitances are the same with each other, and wherein when the respective resistance values of the first path and the second path are different from each other and one of the first switch and the second switch is in an on-state, the other is brought into the off-state.</p> |
