发明名称 |
METHOD AND APPARATUS FOR THE SIMULTANEOUS MULTI-LEVEL AND/OR MULTI-SIMULATOR DESIGN OPTIMIZATION OF ELECTRONIC CIRCUITS |
摘要 |
The present invention relates to a system for synthesizing an electronic circuit at plural abstraction levels. The system includes one or more evaluation tools for evaluating the performance and/or behavior of the circuit at the abstraction levels. The system further includes means for passing parameters and/or performances between abstraction levels and/or evaluation tools. The system is adapted for evaluating the performance and/or behavior of the circuit using at least part of the passed parameters and/or performances at a plurality of the abstraction levels within one synthesis iteration.
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申请公布号 |
US2010049495(A1) |
申请公布日期 |
2010.02.25 |
申请号 |
US20070444091 |
申请日期 |
2007.10.02 |
申请人 |
FRANCKEN KENNETH;VOGELS MARTINUS ANTONIUS HENDRIKUS;DECALUWE JAN MARIA JOZEF |
发明人 |
FRANCKEN KENNETH;VOGELS MARTINUS ANTONIUS HENDRIKUS;DECALUWE JAN MARIA JOZEF |
分类号 |
G06F17/50 |
主分类号 |
G06F17/50 |
代理机构 |
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代理人 |
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地址 |
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