发明名称 |
Fine-grained software-directed data prefetching using integrated high-level and low-level code analysis optimizations |
摘要 |
A mechanism for minimizing effective memory latency without unnecessary cost through fine-grained software-directed data prefetching using integrated high-level and low-level code analysis and optimizations is provided. The mechanism identifies and classifies streams, identifies data that is most likely to incur a cache miss, exploits effective hardware prefetching to determine the proper number of streams to be prefetched, exploits effective data prefetching on different types of streams in order to eliminate redundant prefetching and avoid cache pollution, and uses high-level transformations with integrated lower level cost analysis in the instruction scheduler to schedule prefetch instructions effectively.
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申请公布号 |
US7669194(B2) |
申请公布日期 |
2010.02.23 |
申请号 |
US20040926595 |
申请日期 |
2004.08.26 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
ARCHAMBAULT ROCH GEORGES;BLAINEY ROBERT JAMES;GAO YAOQING;MARTIN ALLAN RUSSELL;MCINNES JAMES LAWRENCE;O'CONNELL FRANCIS PATRICK |
分类号 |
G06F9/44;G06F9/30;G06F9/45 |
主分类号 |
G06F9/44 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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