发明名称 Non-volatile semiconductor device and method of fabricating embedded non-volatile semiconductor memory device with sidewall gate
摘要 A method of manufacturing a non-volatile semiconductor memory device is provided which overcomes a problem of penetration of implanted ions due to the difference of an optimal gate height in simultaneous formation of a self-align split gate type memory cell utilizing a side wall structure and a scaled MOS transistor. A select gate electrode to form a side wall in a memory area is formed to be higher than that of the gate electrode in a logic area so that the height of the side wall gate electrode of the self-align split gate memory cell is greater than that of the gate electrode in the logic area. Height reduction for the gate electrode is performed in the logic area before gate electrode formation.
申请公布号 US7667259(B2) 申请公布日期 2010.02.23
申请号 US20060452256 申请日期 2006.06.14
申请人 RENESAS TECHNOLOGY CORP. 发明人 YASUI KAN;HISAMOTO DIGH;ISHIMARU TETSUYA;KIMURA SHIN-ICHIRO
分类号 H01L21/00 主分类号 H01L21/00
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