发明名称 DESIGN SUPPORT PROGRAM, DESIGN SUPPORT DEVICE, AND DESIGN SUPPORT METHOD
摘要 <P>PROBLEM TO BE SOLVED: To reduce a design period by increasing the speed of design at an early stage. Ž<P>SOLUTION: An architecture 100 is divided by domain. The division is performed in a bus system or/and a clock system. An arbitrary domain is selected among the divided domains 101, 102. The domain 101, for example, is selected. An ESL simulation is performed on the domain 101, and the domain is replaced to a traffic generation device G which generates a traffic equivalent to that of the domain 101. The traffic generation device G and the domain 102 which is not replaced are combined to obtain a new architecture 110. The evaluation result 120 is obtained by performing an ESL simulation again to the new architecture 110. Thereby, the speed of ESL simulation can be increased. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž
申请公布号 JP2010039678(A) 申请公布日期 2010.02.18
申请号 JP20080200605 申请日期 2008.08.04
申请人 FUJITSU LTD 发明人 YAMASHITA KOICHIRO;KUWAHARA JUNGO
分类号 G06F17/50 主分类号 G06F17/50
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