| 摘要 |
<P>PROBLEM TO BE SOLVED: To obtain a high-definition video signal of precision exceeding processing bits. Ž<P>SOLUTION: An encoder 113a generates 10 bits video signals Sa, Sb of an A system and a B system on the basis of 12 bits input video signal Sin. The video signal Sa is upper 10 bits of the video signal Sin. The video signal Sb is obtained by adding to a lowest bit of the high order 10 bits of the video signal Sin 1 when lower 2 bits of the video signal Sin are "10" or more and 0 when they are lower than "10", and state information is superimposed on the video signal Sb. A decoder 113d adds "00" to a lower order of an output Sa' when outputs Sa', Sb' of processing parts 113b and 113c of the A system and B system are same with each other to obtain a 12 bits output video signal Sout. When the output Sa', Sb' differ from each other, the decoder 113d adds "00" to lower orders of the outputs Sa', Sb', performs addition and averaging, and obtains an output video signal Sout of 12 bits. The output video signal Sout has precision equivalent to 11 bits. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž
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