发明名称 MEMORY WITH SHARED READ/WRITE CIRCUIT
摘要 A memory includes memory cells arranged as a matrix of rows and columns between word lines and bit lines, and a set of differential read/write amplifiers for reading and writing of the memory cells and for communicating with local bit lines common to at least some of the memory cells. A read/write circuit is common to the set of differential read/write amplifiers, and a set of selection gateways selectively transfer data between the common read/write circuit and a selected differential read/write amplifier.
申请公布号 US2010039874(A1) 申请公布日期 2010.02.18
申请号 US20090540784 申请日期 2009.08.13
申请人 STMICROELECTRONICS (CROLLES 2) SAS 发明人 VERNET MARC
分类号 G11C7/22;G11C7/02;H01S4/00 主分类号 G11C7/22
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