发明名称 REDUCTION OF FORMING VOLTAGE IN SEMICONDUCTOR DEVICES
摘要 This disclosure provides a nonvolatile memory device and related methods of manufacture and operation. The device may include one or more resistive random access memory (RRAM) that use techniques to provide a memory device with more predictable operation. In particular, forming voltage required by particular designs may be reduced through the use of a barrier layer, a reverse polarity forming voltage pulse, a forming voltage pulse where electrons are injected from a lower work function electrode, or through the use of an anneal in a reducing environment. One or more of these techniques may be applied, depending on desired application and results.
申请公布号 WO2009134677(A3) 申请公布日期 2010.02.18
申请号 WO2009US41582 申请日期 2009.04.23
申请人 INTERMOLECULAR, INC.;WANG, YUN;KUMAR, PRAGATI;CHIANG, TONY, P.;PHATAK, PRASHANT 发明人 WANG, YUN;KUMAR, PRAGATI;CHIANG, TONY, P.;PHATAK, PRASHANT
分类号 G11C5/14;G11C16/00;H01L27/115 主分类号 G11C5/14
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