| 摘要 |
A first phase adjustment circuit adjusts phases of a data decision clock signal and a first boundary decision clock signal according to a phase adjustment amount based on an output signal of a data decision circuit and an output signal of a first boundary decision circuit. A second phase adjustment circuit adjusts a phase of a second boundary decision clock signal according to a result of adding the phase adjustment amount and a phase adjustment amount offset. An adaptive equalization control circuit adjusts an equalization coefficient of an equalization circuit according to a data width of an output signal of the equalization circuit based on a logical comparison result between the output signal of the data decision circuit and an output signal of a second boundary decision circuit when the phase adjustment amount offset is changed.
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