SEMICONDUCTOR MEMORY DEVICE, AND METHOD FOR TESTING THE SAME

摘要

PROBLEM TO BE SOLVED: To provide a semiconductor memory device which can be tested satisfactorily even when only some of a plurality of data input/output terminals are connected to a memory tester, and to provide a method for testing the semiconductor memory device. SOLUTION: The semiconductor memory device includes: data input/output terminals (DQ0 to DQ31); a memory cell array 122; and a data latch circuit 111 for temporarily latching data captured from the data input/output terminals in a normal writing operation and writing the data in the memory cell array with a delay. The data latch circuit 111 includes a test mode in which the data latch circuit latches the data read to the data input/output terminals in a read operation and writes the previously latched data in the memory cell array without newly latching data of the data input/output terminals in a write operation. COPYRIGHT: (C)2010,JPO&INPIT