发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 <p><P>PROBLEM TO BE SOLVED: To reduce a circuit scale in a semiconductor memory device, on which a plurality of memory arrays are mounted. <P>SOLUTION: In the semiconductor memory device, a first topology, where one power source 201 and a plurality of memory arrays 11, 12 and 13 are connected in parallel, and the plurality of memory arrays 11, 12 and 13 and a ground are connected in parallel, and a second topology, where one end of a serial circuit having the plurality of memory arrays 11, 12 and 13 are connected is connected to the power source 201 in series, and the other end of the serial circuit is connected to the ground, are switched mutually in accordance with an operation mode. <P>COPYRIGHT: (C)2010,JPO&INPIT</p>
申请公布号 JP2010040062(A) 申请公布日期 2010.02.18
申请号 JP20080198233 申请日期 2008.07.31
申请人 SANYO ELECTRIC CO LTD 发明人 TAKANO HIROSHI
分类号 G11C16/02;G11C16/04 主分类号 G11C16/02
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