| 摘要 |
PROBLEM TO BE SOLVED: To prevent an increase in leakage current in a bottom gate type TFT where a poly-Si layer and an a-Si layer are laminated. SOLUTION: A gate electrode 103 is formed thin and long in a longitudinal direction as a bottom layer. On the gate electrode 103, a semiconductor layer comprising the poly-Si layer 107 and a-Si layer 108 is formed with a gate insulating film 104 (not shown in the figure) interposed. On the semiconductor layer, a source electrode 110 or drain electrode 111 is formed. An n+Si layer is formed between the source electrode 110 or drain electrode 111 and semiconductor layer. An end ED of the source electrode 110 or drain electrode 111 is formed inside an end ES of the semiconductor layer, so that a leakage current at the end ED of the semiconductor layer is eliminated. COPYRIGHT: (C)2010,JPO&INPIT
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