| 摘要 |
A power integrated circuit includes a gate driver (52) coupled to an output transistor (54) having a plurality of segments (0S 1 ...0S 4 ). The gate driver also has a plurality of segments (GS 1 ...GS 4 ), each of the segments (GS) of the driver circuit being located adjacent a corresponding one of the segments (0S) of the output transistor. |
