发明名称 CACHE CONTROLLER AND CONTROL METHOD
摘要 In such a configuration that a port means is provided which takes a form of being shared among threads and has a plurality of entries for holding access requests, and the access requests for a cache shared by a plurality of threads being executed at the same time are controlled using the port means, the access request issued from each thread is registered on a port section of the port means which is assigned to the thread, thereby controlling the port means to be divided for use in accordance with the thread configuration. In selecting the access request, the access requests are selected for each thread based on the specified priority control from among the access requests issued from the threads held in the port means, thereafter a final access request is selected in accordance with a thread selection signal from among those selected access requests. In accordance with such a configuration, the cache access processing can be carried out while reducing the amount of resources of the port means and assuring effective use of such resources.
申请公布号 KR20100017837(A) 申请公布日期 2010.02.16
申请号 KR20097026258 申请日期 2007.06.19
申请人 FUJITSU LIMITED 发明人 KIYOTA NAOHIRO
分类号 G06F12/08;G06F12/00;G06F13/10 主分类号 G06F12/08
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