发明名称 Driver amplifier circuit having reduced DC bias
摘要 A driver amplifier circuit is provided which includes a voltage level shifting circuit and an Op-Amp. A positive power supply terminal and a negative power supply terminal of the Op-Amp receive a first reference voltage and a second reference voltage outputted from the voltage level shifting circuit, causing a DC voltage level of an output signal to be equal to 0V. Meanwhile, the absolute value of a voltage difference between the first reference voltage and the second reference voltage is equal to VDD, meaning that elements in the circuit operate without risking a high-voltage damage.
申请公布号 US7663429(B2) 申请公布日期 2010.02.16
申请号 US20080031522 申请日期 2008.02.14
申请人 REALTEK SEMICONDUCTOR CORP. 发明人 WANG TZE-CHIEN
分类号 G05F1/10 主分类号 G05F1/10
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