发明名称 Memory circuit and semiconductor device including the memory circuit, the memory circuit including selectors for selecting a data holding circuit
摘要 A semiconductor circuit of the invention comprises: a memory cell array including a plurality of memory cells formed at intersections between a plurality of word lines and a plurality of bit lines; a plurality of sense amplifiers each for amplifying data of the memory cell connected to a selected word line through the bit line; a plurality of data holding circuits each for holding data transferred from the plurality of sense amplifiers; and a plurality of selectors each for selecting a data holding circuit from a unit group including a predetermined number of the data holding circuits based on logic input data, and for externally connecting one end of the selected data holding circuit.
申请公布号 US7663936(B2) 申请公布日期 2010.02.16
申请号 US20070907208 申请日期 2007.10.10
申请人 ELPIDA MEMORY, INC. 发明人 KAJIGAYA KAZUHIKO
分类号 G11C7/00 主分类号 G11C7/00
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