发明名称 Semiconductor device production method that includes forming a gold interconnection layer
摘要 A semiconductor device provided with: a first interconnection layer provided on a semiconductor substrate; an interlevel insulation film provided over the first interconnection layer; a barrier layer provided between the first interconnection layer and the interlevel insulation film; and a second interconnection layer of gold provided as an uppermost interconnection layer on the interlevel insulation film. The barrier layer is formed in a region of the first interconnection layer including an interlevel connection opening region of the interlevel insulation, and the region is greater than the interlevel connection opening region. The second interconnection layer is electrically connected to the first interconnection layer via the barrier layer in the interlevel connection opening.
申请公布号 US7662713(B2) 申请公布日期 2010.02.16
申请号 US20070005383 申请日期 2007.12.27
申请人 ROHM CO., LTD. 发明人 NAKATANI GORO;TAMURA HITOSHI
分类号 H01L21/4763;H01L23/52;H01L21/28;H01L21/283;H01L21/3205;H01L21/768;H01L23/522;H01L23/532 主分类号 H01L21/4763
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