发明名称 Logic compatible arrays and operations
摘要 An array of memory cells arranged in a plurality of rows and a plurality of columns are provided. The array includes a first program line in a first direction, wherein the first program line is connected to program gates of memory cells in a first row of the array; a first erase line in the first direction, wherein the first erase line is connected to erase gates of the memory cells in the first row of the array; and a first word-line in the first direction, wherein the first word-line is connected to word-line nodes of the memory cells in the first row of the array.
申请公布号 US7663916(B2) 申请公布日期 2010.02.16
申请号 US20070787291 申请日期 2007.04.16
申请人 TAIWAN SEMICONDCUTOR MANUFACTURING COMPANY, LTD. 发明人 CHIH YUE-DER;HSU TE-HSUN
分类号 G11C11/34 主分类号 G11C11/34
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