发明名称 Add-subtract coprocessor instruction execution on complex number components with saturation and conditioned on main processor condition flags
摘要 Methods and apparatus for calculating Single-Instruction-Multiple-Data (SIMD) complex arithmetic. A coprocessor instruction has a format identifying a multiply and subtract instruction to generate real components for complex multiplication of first operand complex data and corresponding second operand complex data, a cross multiply and add instruction to generate imaginary components for complex multiplication of the first operand complex data and the corresponding second operand complex data, an add-subtract instruction to add real components of the first operand to imaginary components of the second operand and to subtract real components of the second operand from imaginary components of the first operand, and a subtract-add instruction to subtract the imaginary components of the second operand from the real components of the first operand and to add the real components of the second operand to the imaginary components of the first operand.
申请公布号 US7664930(B2) 申请公布日期 2010.02.16
申请号 US20080155218 申请日期 2008.05.30
申请人 MARVELL INTERNATIONAL LTD 发明人 PAVER NIGEL C.;KHAN MOINUL H.;ALDRICH BRADLEY C.
分类号 G06F9/302 主分类号 G06F9/302
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