| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a semiconductor memory device wherein reset operation is surely executed to many memory cells. <P>SOLUTION: The semiconductor memory device is provided with a memory cell array MA in which memory cells MC in which diodes Di and variable resistance elements VR are connected in series respectively are arranged at cross parts of a plurality of bit lines BL and a plurality of word lines WL. VOLtage VRESET+N*Vαis applied to selection bit lines BL00-BL03 so as to apply the prescribed potential difference VRESET to selection memory cells MC10-MC13 arranged at cross parts of the selection bit lines BL00-BL03 and selection word lines WL01, and voltage Vss=0V is applied to the selection word line WL01. A control circuit makes voltage VRESET+N*Vαchange based on a position of selection memory cells MC10-MC13 in the memory cell array MA. <P>COPYRIGHT: (C)2010,JPO&INPIT</p> |
