发明名称 IMBALANCE REDUCTION CIRCUIT, POWER SUPPLY UNIT AND IMBALANCE REDUCTION METHOD
摘要 <P>PROBLEM TO BE SOLVED: To provide an imbalance reduction circuit, a power supply unit and an imbalance reduction method capable of reducing the possibility that the deterioration in a power accumulating element progressing in deterioration is accelerated due to uniformity of terminal voltage. Ž<P>SOLUTION: The imbalance reduction circuit includes: a voltage detecting section 320 for detecting each of terminal voltages V1-VN in power accumulating bodies B1-BN; a target voltage setting section 334 for setting each of target voltages Vtg1-VtgN corresponding to the power accumulating bodies respectively so that the lower the terminal voltage V1-VN detected by the voltage detecting section 320 are, the higher values of the target voltages Vtg1-VtgN are; and a discharging section 310 for executing discharging processing to discharge the power accumulating bodies B1-BN so that the terminal voltages V1-VN each become the target voltages Vtg1-VtgN set corresponding to the power accumulating bodies. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž
申请公布号 JP2010035285(A) 申请公布日期 2010.02.12
申请号 JP20080192632 申请日期 2008.07.25
申请人 PANASONIC CORP 发明人 IIDA TAKUMA;KIMURA TADAO
分类号 H02J7/02;H01M10/44 主分类号 H02J7/02
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