发明名称 METHOD, SYSTEM AND COMPUTER PROGRAM FOR LOW-POWER DETECTION OF GRACE PERIOD FOLLOWING SHARED DATA ELEMENT UPDATE OPERATION THAT AFFECTS NON-PREEMPTIBLE DATA READER
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a technique for low-power detection of a grace period following a shared data element update operation that affects non-preemptible data readers. <P>SOLUTION: A grace period processing action is implemented that requires a processor that may be running a non-preemptible reader of the shared data element to pass through a quiescent state before further grace period processing can proceed. A power status of the processor is also determined. Further, grace period processing may proceed without requiring the processor to pass through a quiescent state if the power status indicates that quiescent state processing by the processor is unnecessary. <P>COPYRIGHT: (C)2010,JPO&INPIT</p>
申请公布号 JP2010033556(A) 申请公布日期 2010.02.12
申请号 JP20090148407 申请日期 2009.06.23
申请人 INTERNATL BUSINESS MACH CORP <IBM> 发明人 JOSHUA TRIPLETT
分类号 G06F12/00;G06F1/32 主分类号 G06F12/00
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