摘要 |
<P>PROBLEM TO BE SOLVED: To provide a semiconductor device capable of effectively preventing drop of a power voltage and rise of a ground voltage due to wiring resistance, in a semiconductor package of wire bonding connection. <P>SOLUTION: First bonding pads 22 connected to external connection terminals 17B to receive a power voltage VDDB are formed in a peripheral region of a substrate 10. Second and third bonding pads 27, 28 are formed on a power wiring pattern 14, and the second and third bonding pads 27 and 28 are connected to each other through auxiliary wires 29. In this case, the second and third bonding pads 27 and 28 and the auxiliary wires 29 are arranged in a region 42 where the arrangement of the power wiring pattern 14 is restricted. Accordingly, drop of the power voltage VDDB at the center part of a semiconductor chip 1 due to wiring resistance can be prevented. <P>COPYRIGHT: (C)2010,JPO&INPIT |