| 摘要 |
<p>A readout circuit (30) wherein a readout bit line (RBIT) is used as output wiring in a memory cell (100) is composed of a transistor (31) for switching, a transistor (32) for resetting and a transistor (33) for driving output wiring. The transistor (31) for switching connects a data holding node (MD) and a control line (DR) of a storage circuit (10) to each other by a control signal of the readout word line (/RWL0). The transistor (32) for resetting resets a control line (DR) by a reset control signal (RST). The transistor (33) for driving output wiring is provided with a gate connected to the control line (DR), a drain connected to the readout bit line (RBIT), and a source connected to a ground power supply.</p> |
