D-CLASS DIGITAL AMPLIFIER CONFIGURED FOR SHAPING NON-IDEALITIES OF AN OUTPUT SIGNAL

摘要

The invention relates to an amplifier (A2) including a digital delta-sigma modulator (2), a quantifier (QT1) receiving a signal (NSS) provided by a delta-sigma stage (DS5) and providing a quantified signal (QS), and a power circuit (PA) providing an output signal (OS). The device includes N state loops of a first type configured for sending the output signal (OS) back to adders of N lower-rank delta-sigma stages, each state loop of the first type including an analog low-pass filter (LPF1) for providing a filtered output signal (FOS), and an analog-to-digital converter (ADC) for providing a digitised filtered output signal (DFOS).