Configuration and method of manufacturing the one-time programmable (OTP) memory cells

摘要

This invention discloses a method for manufacturing a one-time programmable (OTP) memory includes a first and second MOS transistors connected in parallel and controlled by a common gate formed with a single polysilicon stripe. The method further comprises a step of implanting a drift region in a substrate region below a drain and source of the first and second MOS transistors counter doping a lightly dope drain (LDD) encompassing and surrounding a drain and a source of the first MOS transistor having a different threshold voltage than the second MOS transistor not reached by the drift region.