发明名称 |
Method and system for instruction tracing with enhanced interrupt avoidance |
摘要 |
A method, system, apparatus, and computer program product is presented for tracing operations. A set of related methodologies can be used within instruction tracing software, such as a tracing program, to reduce its tendency to generate interrupts that cause unwanted effects in the system that is being captured. A first methodology allows access to protected memory blocks so that instructions may be read from those memory blocks. A second methodology provides for the trace output buffer to be accessed using physical addressing. A third methodology traces only instruction addresses, which are resolved later during a post-processing phase of operation. A fourth methodology comprises multiple different methods for obtaining copies of instructions that have already executed rather than obtaining them before they are executed. |
申请公布号 |
US7661035(B2) |
申请公布日期 |
2010.02.09 |
申请号 |
US20070933854 |
申请日期 |
2007.11.01 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
DEWITT, JR. JIMMIE EARL;HUSSAIN RIAZ Y.;LEVINE FRANK ELIOT;URQUHART ROBERT JOHN |
分类号 |
G06F11/00;G06F11/34;G06F11/36 |
主分类号 |
G06F11/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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