发明名称 Apparatus and method to reduce jitter in a phase locked loop
摘要 A circuit and method to reduce jitter and/or noise in a phase-locked loop (PLL). A voltage-controlled oscillator (VCO) control signal is tapped and filtered to create a low-noise, filtered VCO control signal. The filtered and unfiltered control signals are individually weighted and then combined to create a modified VCO control signal which reduces the jitter and/or the noise by reducing an effect of VCO gain on the jitter and/or the noise.
申请公布号 US7659782(B2) 申请公布日期 2010.02.09
申请号 US20060598104 申请日期 2006.11.13
申请人 BROADCOM CORPORATION 发明人 CONG YONGHUA
分类号 H03L7/00 主分类号 H03L7/00
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