发明名称 Method and apparatus for analyzing performance, and computer product
摘要 In a performance analyzing apparatus, a setting unit sets an event of which the performance is desired to be monitored, a detecting unit detects an instruction address at the time of generation of an interrupt signal from a timer, and a calculating unit calculates a variation amount of a counted value by a hardware counter at a detected instruction address. The variation amount is accumulatively retained for each detected instruction address. A specifying unit specifies an instruction address that corresponds to the event, and a display unit displays a graph of the total variation amounts.
申请公布号 US7660974(B2) 申请公布日期 2010.02.09
申请号 US20060524398 申请日期 2006.09.21
申请人 FUJITSU MICROELECTRONICS LIMITED 发明人 KIMURA SHIGERU
分类号 G06F11/32;G06F11/30 主分类号 G06F11/32
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