| 摘要 |
<P>PROBLEM TO BE SOLVED: To automatically set the optimal read timing of a data signal. <P>SOLUTION: A one-to-two de-multiplexer which commonly inputs an input data signal to two flip-flops 21<SB>1</SB>, 21<SB>2</SB>, and gives read clocks C1, C2 of which each period is two times of the clock-period of the input signal and phases are shifted for a clock-period each other to the flip-flop 21<SB>1</SB>, 21<SB>2</SB>, includes a phase shifter 24 for relatively varying the phase of the read clock C1, C2 to the input data signal, a first exclusive-OR circuit 26 which finds an exclusive-OR of mutual read data of the two flip-flops 21<SB>1</SB>, 21<SB>2</SB>of which the read processing is continuous, a first filter 27 which extracts a DC component from the output, and a phase setting means 40 which varies continuously the phase of the read clock C1, C2 as much as the clock period or more, and finds the optimal phase shift amount based on the phase shift amount when the output value of the first filter 27 is changed, and sets it in the phase shifter 24. <P>COPYRIGHT: (C)2010,JPO&INPIT |
