| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor device with a lateral insulation gate transistor element achieving downsizing while suppressing ON resistance increase, and to provide a manufacturing method therefor. SOLUTION: The semiconductor device includes an LDMOS element formed on a semiconductor layer and a first contact plug serving as a contact plug formed to pass through an insulation film formed on a main surface of the semiconductor layer from the main surface and connected to source and base contact regions. The base contact region is formed at a position lower than the position of the source region relative to the main surface almost perpendicularly to the main surface of the semiconductor layer and where it at least partially overlaps the source region along the main surface of the semiconductor layer. The first contact plug is extended up to the base contact region passing through the insulation film and the source region. COPYRIGHT: (C)2010,JPO&INPIT |
