发明名称 DITHERING A DIGITALLY-CONTROLLED OSCILLATOR OUTPUT IN A PHASE-LOCKED LOOP
摘要 A digitally-controlled oscillator (DCO) of a PLL is dithered such that a DCO_OUT signal has a frequency that changes at dithered intervals. In one example, the DCO receives an undithered stream of incoming digital tuning words, and receives a dithered reference clock signal REFD, and outputs the DCO_OUT signal such that its frequency changes occur at dithered intervals. Where the PLL is employed in the local oscillator of a cellular telephone transmitter, the novel dithering of the DCO spreads digital image noise out in frequency such that less digital image noise is present at a particular frequency offset from the main local oscillator frequency. Spreading digital image noise out in frequency allows a noise specification to be met without having to increase the frequency of the PLL reference clock. By avoiding increasing the frequency of the reference clock to meet the noise specification, increases in power consumption are avoided.
申请公布号 WO2009152106(A3) 申请公布日期 2010.02.04
申请号 WO2009US46643 申请日期 2009.06.08
申请人 QUALCOMM INCORPORATED;BALLANTYNE, GARY, JOHN 发明人 BALLANTYNE, GARY, JOHN
分类号 H03L7/099;H03C3/09;H03L7/085 主分类号 H03L7/099
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