发明名称 METHODS FOR DESIGNING INTEGRATED CIRCUITS EMPLOYING VOLTAGE SCALING AND INTEGRATED CIRCUITS DESIGNED THEREBY
摘要 Various embodiments of methods of designing an integrated circuit (IC). One embodiment of one such method includes: (1) generating a functional design for the IC, (2) determining performance objectives for the IC, (3) determining an optimization target voltage for the IC, (4) determining whether the IC needs voltage scaling to achieve the performance objectives at the optimization target voltage and, if so, whether the IC is to employ static voltage scaling or adaptive voltage scaling, (5) using the optimization target voltage to implement a layout from the functional IC design that meets the performance objectives and (6) performing a timing signoff of the layout at the optimization target voltage.
申请公布号 US2010026378(A1) 申请公布日期 2010.02.04
申请号 US20090364918 申请日期 2009.02.03
申请人 AGERE SYSTEMS, INC. 发明人 PARKER JAMES C.;RAO VISHWAS M.;SCHNEIDER, JR. CLAYTON E.;SHEETS GREGORY W.;SUBBARAO PRASAD
分类号 G05F1/10;G06F17/50 主分类号 G05F1/10
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