发明名称 Packet switch device
摘要 <p>A packet switch device is provided with a forwarding process unit (112-n) that determines an address for an input packet and outputs it as an output packet, an ingress interface card (115) that checks whether the input packet has a sequential patrol number, and an egress interface card (116) that generates a sequential patrol number and grants it to the output packet. The ingress interface card and the egress interface card are provided with a first memory interface unit (408, 508) and a second memory interface unit (409, 509) that carry out two dividing processes by doing one access process for check managing memories (407, 507) at continuing first and second memory access points (n, n+1), respectively, thereby making it possible to complete necessary processing in several clock cycles that are allowed at one-time table access by the forwarding process unit.</p>
申请公布号 GB2462237(A) 申请公布日期 2010.02.03
申请号 GB20090021061 申请日期 2007.06.04
申请人 FUJITSU LIMITED 发明人 KANTA YAMAMOTO
分类号 H04L12/931;H04L12/935 主分类号 H04L12/931
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