发明名称 |
ASYNCHRONOUS COMMUNICATION USING STANDARD BOUNDARY ARCHITECTURE CELLS |
摘要 |
PURPOSE: An IEEE 1149.1 jtag standard extension method and a device thereof are provided to reuse an existing boundary scan architecture, thereby considerably reducing wiring congestion. CONSTITUTION: A boundary scan architecture(10) is arranged on an integrated circuit. A plurality of functional registers(12) and microphone chip logics(20) belong to a microchip area which include the functional circuit of the integrated circuit. A plurality of input/output units(14) are arranged in a serial communication chain. The serial communication chain is located around the boundary of the functional circuit of the integrated circuit.
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申请公布号 |
KR20100011893(A) |
申请公布日期 |
2010.02.03 |
申请号 |
KR20090052229 |
申请日期 |
2009.06.12 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
SCHENCK BRANDON EDWARD;HAMILTON MICHAEL JOHN;DOUSKEY STEVEN MICHAEL |
分类号 |
G06F13/38;G06F13/40 |
主分类号 |
G06F13/38 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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