发明名称 TECHNIQUE FOR REDUCING SILICIDE NON-UNIFORMITIES IN POLYSILICON GATE ELECTRODES BY AN INTERMEDIATE DIFFUSION BLOCKING LAYER
摘要 Threshold variability in advanced transistor elements, as well as increased leakage currents, may be reduced by incorporating a barrier material in a polysilicon gate electrode. The barrier material results in a well-controllable and well-defined metal silicide in the polysilicon gate electrode during the silicidation sequence and during the further processing by significantly reducing the diffusion of a metal species, such as nickel, into the vicinity of the gate dielectric material.
申请公布号 US2010025782(A1) 申请公布日期 2010.02.04
申请号 US20090464917 申请日期 2009.05.13
申请人 GRIEBENOW UWE;FROHBERG KAI;RUTTLOFF KERSTIN 发明人 GRIEBENOW UWE;FROHBERG KAI;RUTTLOFF KERSTIN
分类号 H01L29/49;H01L21/28 主分类号 H01L29/49
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