| 摘要 |
A spread-spectrum clock generator is provided, which includes a modulation module and a voltage-controlled delay line (VCDL). The modulation module provides a control voltage. The VCDL is coupled to the modulation module and is configured for modulating the frequency of an input clock signal according to the control voltage, so as to output an output clock signal. The modulation profile of the output clock signal is a periodic function of time.
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