发明名称 |
IMPLANTATION FOR SHALLOW TRENCH ISOLATION (STI) FORMATION AND FOR STRESS FOR TRANSISTOR PERFORMANCE ENHANCEMENT |
摘要 |
<p>IMPLANTATION FOR SHALLOW TRENCH ISOLATION (STI) FORMATION AND FOR STRESS FOR TRANSISTOR PERFORMANCE ENHANCEMENT A method (and semiconductor device) of fabricating a semiconductor device provides a shallow trench isolation (STI) structure or region by implanting ions in the STI region. After implantation, the region (of substrate material and ions of a different element) is thermally annealed producing a dielectric material operable for isolating two adjacent field-effect transistors (FET). This eliminates the conventional steps of removing substrate material to form the trench and refilling the trench with dielectric material. Implantation of nitrogen ions into an STI region adjacent a p-type FET applies a compressive stress to the transistor channel region to enhance transistor performance. Implantation of oxygen ions into an STI region adjacent an n-type FET applies a tensile stress to the transistor channel region to enhance transistor performance.</p> |
申请公布号 |
SG158008(A1) |
申请公布日期 |
2010.01.29 |
申请号 |
SG20090032384 |
申请日期 |
2009.05.12 |
申请人 |
CHARTERED SEMICONDUCTOR MANUFACTURING LTD |
发明人 |
BEICHAO ZHANG;WIDODO JOHNNY;BOON TAN JUAN;KONG SIEW YONG;FAN ZHANG;HAIFENG SHENG;WENHE LIN;WAY TEH YOUNG;JINPING LIU;HO VINCENT;CHOO HSIA LIANG |
分类号 |
|
主分类号 |
|
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|