发明名称 Subsystem boot and peripheral data transfer architecture for a subsystem of a system-on- chip
摘要 A subsystem (200) is provided at least Direct Memory Access (DMA) device (220) utilized to provide instructions to facilitate the operation of a subsystem processor (210). In one embodiment, a system level processor (102) initiates the provision of instructions for a subsystem (210). The DMA device may be additionally or alternatively utilized to provide data transfer capabilities to a plurality of data channels in a subsystem (200). The DMA device processes channels in a time limited manner to ensure that data is processed in a manner appropriate for time critical data.
申请公布号 US7653763(B2) 申请公布日期 2010.01.26
申请号 US20030469529 申请日期 2003.08.28
申请人 CAVIUM NETWORKS, INC. 发明人 GADKARI MILEEND;GREWAL HARSIMRAN S.;APOSTOL, JR. GEORGE
分类号 G06F13/28;G06F13/14;G06F13/16;G06F13/362;G06F13/364;G06F15/177;G06F21/00;H04K1/00;H04L12/66 主分类号 G06F13/28
代理机构 代理人
主权项
地址