发明名称 |
Standby current erasion circuit of DRAM |
摘要 |
The present invention discloses a standby current erasion circuit applied in DRAM, which improves prior art word line driving circuit to have the word line voltage outputted in standby mode be equal to the bit line voltage, thereby the short DC standby current between the word line and bit line can be erased.
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申请公布号 |
US7652290(B2) |
申请公布日期 |
2010.01.26 |
申请号 |
US20020232460 |
申请日期 |
2002.08.30 |
申请人 |
WINBOND ELECTRONICS CORPORATION |
发明人 |
LIN YU-CHANG |
分类号 |
H01L27/108;G11C7/12;G11C7/18;G11C8/08;G11C8/10;G11C8/14;G11C11/408;G11C29/04;G11C29/12;G11C29/50 |
主分类号 |
H01L27/108 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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