发明名称 LOW CLAMP VOLTAGE ESD DEVICE AND METHOD THEREFOR
摘要 PURPOSE: A low clamp voltage ESD device and method therefor are provided to minimize the clamp voltage of the ESD device. CONSTITUTION: If the serge event or the electrostatic discharge event is received in the terminal(111), the terminal is limited by the positive voltage. The positive voltage is proceed the forward bias of the diode(114). As voltage between the terminal reaches the positive critical voltage [positive threshold voltage] of the device(100), the positive current (Ip) flows from the terminal through diode to the diode(118). The positive current flows through diode to the terminal(117). The device clamps the clamp voltage between terminals with the voltage drop.
申请公布号 KR20100007732(A) 申请公布日期 2010.01.22
申请号 KR20090061172 申请日期 2009.07.06
申请人 SEMICONDUCTOR COMPONENTS INDUSTRIES, L.L.C. 发明人 MARREIRO DAVID D.;SHASTRI SUDHAMA C.;SALIH ALI;LIU MINGJIAO;PARSEY JOHN MICHAEL JR.
分类号 H01L27/04 主分类号 H01L27/04
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