发明名称 MEMORY CONTROLLER, MEMORY SYSTEM, AND CONTROL METHOD FOR MEMORY SYSTEM
摘要 PURPOSE: A memory controller, a memory system, and a control method for the memory system are provided to access a semiconductor memory unit which is capable of storing multi-bit data in a single memory cell by a memory interleaving mode. CONSTITUTION: A NAND I/F(19) controls the interface with a semiconductor memory unit(20) having multiple chips consisting of multiple memory cells. A CPU(14) repeatedly executes the writing program about all pages of N kind types within the memory cell belonging to one chip among the chips. The above CPU executes the writing program about all pages of N kind types within the memory cell belonging to the chip of the other one to the interleaved mode.
申请公布号 KR20100007813(A) 申请公布日期 2010.01.22
申请号 KR20090063614 申请日期 2009.07.13
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 SHIRAISHI ATSUSHI;KITAZUME TOSHIHIKO
分类号 G06F13/16;G06F12/00;G06F12/06 主分类号 G06F13/16
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