发明名称 Identifying An Optimized Test Bit Pattern For Analyzing Electrical Communications Channel Topologies
摘要 Identifying an optimized test bit pattern for analyzing electrical communications channel topologies, including: ranking according to channel quality, from worst to best, a set of channel topologies for an electrical communications channel; and for each ranked channel topology beginning with the worst, carrying out the following steps in an iterative loop until a concatenated test bit pattern and a previously optimized test bit pattern are functionally equally fit: concatenating to a previously optimized test bit pattern an additional test bit pattern; optimizing the concatenated test bit pattern values for a next ranked channel in the subset, leaving the optimized values of the previously optimized test bit pattern unchanged; and comparing through use of a fitness function the relative qualities of the previously optimized test bit pattern and the optimized concatenated test bit pattern.
申请公布号 US2010014569(A1) 申请公布日期 2010.01.21
申请号 US20080174349 申请日期 2008.07.16
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 CASES MOISES;MUTNURY BHYRAV M.;SINGH NAVRAJ;WESLEY CALEB J.
分类号 H04B17/00 主分类号 H04B17/00
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