发明名称 MEMORY CONTROLLER
摘要 PROBLEM TO BE SOLVED: To reduce a capacity of a memory in which data processed by a processor are stored. SOLUTION: Upon receiving a write request to write write-data Y into an address Bn of a memory region RB issued by the processor 1, a memory controller 2 determines whether read-data X requested to be read from an address Am of a memory region RA by the processor 1 are matched with the write-data Y instructed by the processor 1 so that the data are requested to be written into the address Bn of the memory region RB , and if the read-data X are matched with the write-data Y, prevents the write-data Y from being written into the address Bn of the memory region RB. COPYRIGHT: (C)2010,JPO&INPIT
申请公布号 JP2010015438(A) 申请公布日期 2010.01.21
申请号 JP20080175825 申请日期 2008.07.04
申请人 TOSHIBA CORP 发明人 WADA TAKAHISA;MIYAMORI TAKASHI;ISHIWATARI SHUNICHI;KIMURA KATSUYUKI;NAKANISHI KEIRI;SUMIYOSHI MASATO;TANABE YASUTAKA;HANEDA RYUJI
分类号 G06F12/00;G06T1/20 主分类号 G06F12/00
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