| 摘要 |
<P>PROBLEM TO BE SOLVED: To solve the problem that a band width becomes a bottleneck, because a crossbar switch copes with increase of a scale. <P>SOLUTION: This memory/logic conjugate system is a system configured by three-dimensionally layering: a plurality of cluster chips respectively including a plurality of cluster memories 20 each disposed with basic cells 10 each having a memory circuit in a cluster state; and a controller chip for controlling the plurality of cluster memories. The plurality of cluster memories 20 positioned along a layering direction of the plurality of cluster memory chips and the controller chip are electrically connected to the controller chip through a multi-bus 11 including through-hole vias. By directly accessing an optional basic cell 10 from the controller chip through the multi-bus 11 to write truth value data, the optional basic cell 10 is changed over to a logic circuit. <P>COPYRIGHT: (C)2010,JPO&INPIT |
